UMC's Integrated DFM Solutions Target Today's 90-nm SoC Designers

UMC (HSINCHU, Taiwan), has announced its comprehensive design-for-manufacturing (DFM), yield optimization offering targeted to customers developing 90-nm SoCs. The package incorporates DFM elements into standard-cell libraries, SPICE models and design flows to provide users with yield-enhancing knowledge throughout the design and manufacturing stages.

UMC's DFM Value Service, a key part of the DFM package, includes a comprehensive design for diagnostic platform that enables UMC to test, map out, and pinpoint physical failures on customers' chips quickly, without the extensive and drawn-out process of exchanging information back and forth between the foundry and customer. Through this approach, engineering teams spend less effort on the diagnostic process and thus they can quickly enhance yields, gain faster time to market, and have lower production costs.

Lee Chung, vice president of corporate marketing at UMC, said, "With the rising complexity of 90nm and below designs, meeting time to market objectives has become increasingly difficult for today's SoC designers. UMC's manufacturing teams collaborated closely with our customers' design teams to achieve the common goal of quick ramp up to high and stable yields for SoC designs. This means customers can get their SoC designs from the development stage to market quickly and with greater cost efficiencies." UMC's DFM package incorporates the following elements:

 DFM Counselor-the comprehensive documents and models for guiding users throughout the design phase. It features a Design Support Manual covering:
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- DFM recommended rules, guidelines and Optical Proximity Correction (OPC) guidelines

- SPICE models including Length of Diffusion (LOD) effects and Monte Carlo models

- Intercap models including Wire Edge Effects (WEE)

- DFM Application Note

 DFM Counselor Tools-the comprehensive software programs and technology files supporting all major EDA tools for implementing the DFM features:
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- DFM scripts for double-VIA insertion and limiting VIA stacking

- DFM DRC decks for checking the recommended DFM rules

- DFM Layout Parameter Extraction (LPE) and Layout vs. Schematic (LVS) technology files for supporting the inclusion of WEE and LOD effects.

 DFM Value Service-the DFM services completed at UMC in order to give customers the best value:
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- Post tapeout OPC and Lithography Rule Check (LRC)

- Metal dummy fill

- Metal slotting

- UMC's proprietary Design for Diagnostics yield ramping service created so that customers' engineering teams can minimize their time required on the diagnostic process.

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